DLCOA - To realize HALF AND FULL ADDER arithmetic circuits

 AIM: To realize HALF  AND FULL ADDER  arithmetic circuits..

Objectives:

1. To implement  Half adder circuit  and verify  truth table.

2. To implement   Full  adder circuit  and verify  truth table

CO’s to be achieved: 1 (Design and simulate different digital circuits)

PO’s to be achieved:   PO1, PO2, PO3, PO10

APPARATUS REQUIRED: Power supply , Breadboard

COMPONENTS: ICs 7486,7408, 7432 and trainer kit

THEORY:

Half adder :A basic module used in binary arithmetic elements is the half-adder. The function of the half-adder is to add two binary digits, producing a sum according to the binary addition rules.

2. Full adder: The adder circuit is capable of adding the content of two registers. It must include provision for handling carries as well as an addend and augends bits. So there must be three inputs to each stage of a multi digit adder, except the stage for the least significant bits. One for each input from the numbers being added, one for any carry that might have been generated or propagated by the previous stage.

CIRCUIT DIAGRAM:

Half Adder:

Truth table:

A	B	CARRY	SUM
0	0	0	0
0	1	0	1
1	0	0	1
1	1	1	0

            Boolean Expressions:

                Carry=A B

Full Adder:

Basic gates:

PROCEDURE: 

    Please refer  virtual lab  1) http://he-coep.vlabs.ac.in/ 

                                                        2) https://de-iitr.vlabs.ac.in/

                                              3) http://vlabs.iitkgp.ernet.in/coa/ 

1. Connections are given as per circuit diagram.

2. Logical inputs are given as per circuit diagram.

3. Observe the output and verify the truth table.

Input and Output:

FULL ADDER

HALF ADDER

Observations and learning:

From the simulation we learnt the connections of full adder and half adder and its truth table.

We get the carry-output and the sum-output from simulator.