DLCOA - To implement ripple carry adder
AIM: To implement ripple carry adder
Objectives: To implement n-bit ripple carry adder using virtual lab.
CO’s to be achieved: 1 (Design and simulate different digital circuits)
PO’s to be achieved: PO1, PO2, PO3, PO10
APPARATUS REQUIRED: Power supply , Breadboard, virtual simulator
COMPONENTS: ICs 7486,7408, 7432 and trainer kit
THEORY:
Full adder: The adder circuit is capable of adding the content of two registers. It must include provision for handling carries as well as an addend and augends bits. So there must be three inputs to each stage of a multi digit adder, except the stage for the least significant bits. One for each input from the numbers being added, one for any carry that might have been generated or propagated by the previous stage.
Ripple Carry Adder-
Ripple Carry Adder is a combinational logic circuit.
It is used for the purpose of adding two n-bit binary numbers.
It requires n full adders in its circuit for adding two n-bit binary numbers.
It is also known as n-bit parallel adder.
In a ripple carry adder, multiple full adder circuits can be cascaded in parallel to add an N-bit number. For an N- bit parallel adder, there must be N number of full adder circuits. A ripple carry adder is a logic circuit in which the carry-out of each full adder is the carry in of the succeeding next most significant full adder. It is called a ripple carry adder because each carry bit gets rippled into the next stage. In a ripple carry adder the sum and carry out bits of any half adder stage is not valid until the carry in of that stage occurs. Propagation delays inside the logic circuitry is the reason behind this. Propagation delay is time elapsed between the application of an input and occurance of the corresponding output. Consider a NOT gate, When the input is “0” the output will be “1” and vice versa. The time taken for the NOT gate’s output to become “0” after the application of logic “1” to the NOT gate’s input is the propagation delay here. Similarly the carry propagation delay is the time elapsed between the application of the carry in signal and the occurance of the carry out (Cout) signal.
Ripple Carry Adder works in different stages.
Each full adder takes the carry-in as input and produces carry-out and sum bit as output.
The carry-out produced by a full adder serves as carry-in for its adjacent most significant full adder.
When carry-in becomes available to the full adder, it activates the full adder.
After full adder becomes activated, it comes into operation.
CIRCUIT DIAGRAM:
Full Adder:
Basic gates:
Working Of 4-bit Ripple Carry Adder-
Let-
The two 4-bit numbers are 0101 (A3A2A1A0) and 1010 (B3B2B1B0).
These numbers are to be added using a 4-bit ripple carry adder.
4-bit Ripple Carry Adder carries out the addition as explained in the following stages-
Stage-01:
When Cin is fed as input to the full Adder A, it activates the full adder A.
Then at full adder A, A0 = 1, B0 = 0, Cin = 0.
Full adder A computes the sum bit and carry bit as-
Calculation of S0–
S0 = A0 ⊕ B0 ⊕ Cin
S0 = 1 ⊕ 0 ⊕ 0
S0 = 1
Calculation of C0–
C0 = A0B0 ⊕ B0Cin ⊕ CinA0
C0 = 1.0 ⊕ 0.0 ⊕ 0.1
C0 = 0 ⊕ 0 ⊕ 0
C0 = 0
Stage-02:
When C0 is fed as input to the full adder B, it activates the full adder B.
Then at full adder B, A1 = 0, B1 = 1, C0 = 0.
Full adder B computes the sum bit and carry bit as-
Calculation of S1–
S1 = A1 ⊕ B1 ⊕ C0
S1 = 0 ⊕ 1 ⊕ 0
S1 = 1
Calculation of C1–
C1 = A1B1 ⊕ B1C0 ⊕ C0A1
C1 = 0.1 ⊕ 1.0 ⊕ 0.0
C1 = 0 ⊕ 0 ⊕ 0
C1 = 0
Stage-03:
When C1 is fed as input to the full adder C, it activates the full adder C.
Then at full adder C, A2 = 1, B2 = 0, C1 = 0.
Full adder C computes the sum bit and carry bit as-
Calculation of S2–
S2 = A2 ⊕ B2 ⊕ C1
S2 = 1 ⊕ 0 ⊕ 0
S2 = 1
Calculation of C2–
C2 = A2B2 ⊕ B2C1 ⊕ C1A2
C2 = 1.0 ⊕ 0.0 ⊕ 0.1
C2 = 0 ⊕ 0 ⊕ 0
C2 = 0
Stage-04:
When C2 is fed as input to the full adder D, it activates the full adder D.
Then at full adder D, A3 = 0, B3 = 1, C2 = 0.
Full adder D computes the sum bit and carry bit as-
Calculation of S3–
S3 = A3 ⊕ B3 ⊕ C2
S3 = 0 ⊕ 1 ⊕ 0
S3 = 1
Calculation of C3–
C3 = A3B3 ⊕ B3C2 ⊕ C2A3
C3 = 0.1 ⊕ 1.0 ⊕ 0.0
C3 = 0 ⊕ 0 ⊕ 0
C3 = 0
Thus finally,
Output Sum = S3S2S1S0 = 1111
Output Carry = C3 = 0
PROCEDURE:
Please refer virtual lab 1) http://he-coep.vlabs.ac.in/ 2) https://de-iitr.vlabs.ac.in/
3) http://vlabs.iitkgp.ernet.in/coa/
4) http://www.ecs.umass.edu/ece/koren/arith/simulator/Add/ripple/ripple.html
Connections are given as per circuit diagram.
Logical inputs are given as per circuit diagram.
Observe the output and verify the truth table.
Input and Output:
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