Engineering Needz

 Experiment No.07 A.1 Aim:  Implement Sutherland Hodgeman polygon clipping algorithm. A.2 Prerequisite: 1. C Language. 2. Geometric Concepts. 3. Concept of 2D basic Transformations. 4. Clipping Concepts. A.3 Outcome:              After successful completion of this experiment students will be able to, Apply the transformations and clipping algorithms on graphical objects. A.4 Theory:  The Sutherland-Hodgman algorithm clips a polygon against all edges of the clipping region in turn. The Sutherland - Hodgman algorithm performs a clipping of a polygon against each window edge in turn. It accepts an ordered sequence of verices v1, v2, v3, ..., vn and puts out a set of vertices defining the clipped polygon.  This figure represents a polygon (the large, solid, upward pointing arrow) before clipping has occurred.  The following figures show how this algorithm works at each edge, clipping the polygon.  Clipping against the left side of the clip window. Clipping against the top side of the clip

 Experiment No.06 Aim:  Implement Cohen Sutherland Line Clipping Algorithm.           Prerequisite: 1. C Language. 2. Geometric Concepts. 3. Concept of 2D basic Transformations. 4. Clipping Concepts. Outcome:              After successful completion of this experiment students will be able to, Apply the transformations and clipping algorithms on graphical objects. Theory:  Line Clipping The concept of line clipping is same as point clipping. In line clipping, we will cut the portion of line which is outside of window and keep only the portion that is inside the window. Cohen-Sutherland Line Clippings This algorithm uses the clipping window as shown in the following figure. The minimum coordinate for the clipping region is (XWmin,YWmin)(XWmin,YWmin) and the maximum coordinate for the clipping region is (XWmax,YWmax)(XWmax,YWmax). We will use 4-bits to divide the entire region. These 4 bits represent the Top, Bottom, Right, and Left of the region as shown in the following figure. Here, t

 EXPERIMENT NO.1     AIM: To study and verify the truth table of various logic gates using ICs and realize Boolean expressions using gates Objectives: To implement basic gates (AND, OR, NOT) and verify their truth table. To implement universal gates (NAND, NOR) and verify their truth table To implement derived gates (XOR, XNOR) and verify their truth table. CO’s to be achieved: 1 (Design and simulate different digital circuits) PO’s to be achieved: PO1, PO2, PO3, PO10 APPARATUS REQUIRED: SR.NO COMPONENT SPECIFICATION QTY 1. AND GATE IC 7408 1 2. OR GATE IC 7432 1 3. NOT GATE IC 7404 1 4. NAND GATE 2 I/P IC 7400 1 5. NOR GATE IC 7402 1 6. X-OR GATE IC 7486 1 7. NAND GATE 3 I/P IC 7410 1 8. IC TRAINER KIT - 1 THEORY: Circuit that takes the logical decision and the process are called logic gates. Each gate has one or more input but only one output. OR, AND, and NOT are basic gates. NAND, NOR and X-OR are known as Universal gates. Basic gates form these gates. AND GATE: The AND gate